Views: 0 Author: Site Editor Publish Time: 2024-05-24 Origin: Site
After completing the pre-layout of components, it will focus on analysing the wiring bottleneck of the PCB. Combined with other EDA tools to analyse the wiring density of the circuit board; and then a combination of special wiring requirements of the signal lines such as differential lines, sensitive signal lines, etc., the number and type to determine the number of layers of the signal layer; and then according to the type of power supply, isolation and anti-jamming requirements to determine the number of layers of the internal electrical layer. In this way, the number of layers of the entire circuit board is basically determined.
After determining the number of layers of the circuit board, the next step is to reasonably arrange the placement order of the various layers of the circuit. In this step, the factors to be considered are mainly the following two points.
(1) Distribution of special signal layers.
(2) Distribution of power and ground layers.
If the circuit board has more layers, the more varieties of combinations of special signal layers, ground layers and power supply layers are arranged, the more difficult it is to determine which combination is optimal, but the general principles are as follows.
(1) The signal layer should be adjacent to an internal power layer (internal power/ground layer), using the large copper film of the internal power layer to provide shielding for the signal layer.
(2) The internal power and ground layers should be tightly coupled, i.e., the dielectric thickness between the internal power and ground layers should take on a smaller value to increase the capacitance between the power and ground layers and increase the resonant frequency.
(3) The high-speed signal transmission layer in the circuit should be a signal intermediate layer and sandwiched between the two internal power layers. In this way, the copper film of the two inner electric layers can provide electromagnetic shielding for high-speed signal transmission, and also effectively limit the radiation of high-speed signals between the two inner electric layers without causing interference to the outside world.
(4) Avoid two signal layers directly adjacent to each other. It is easy to introduce crosstalk between adjacent signal layers, which can lead to circuit failure. Adding a ground plane between two signal layers can effectively avoid crosstalk.
(5) Multiple grounded internal electrical layers can effectively reduce ground impedance. For example, the use of separate ground planes for the A signal layer and the B signal layer can effectively reduce common mode interference.
(6) Take into account the symmetry of the layer structure.
The following is an example of a 4-layer board to illustrate how to prefer the arrangement and combination of various laminated structures.
For a commonly used 4-layer board, there are the following types of layer stacking (from the top layer to the bottom layer).
(1) Siganl_1 (Top), GND (Inner_1), POWER (Inner_2), Siganl_2 (Bottom).
(2) Siganl_1 (Top), POWER (Inner_1), GND (Inner_2), Siganl_2 (Bottom).
(3) POWER (Top), Siganl_1 (Inner_1), GND (Inner_2), Siganl_2 (Bottom).
Obviously, Option 3 power and ground layers lack effective coupling and should not be adopted.
So how should Option 1 and Option 2 be selected? Typically, designers choose Option 1 as the structure for a 4-layer board. The reason for this choice is not that Option 2 cannot be used, but that PCBs generally only place components on the top layer, so Option 1 is more appropriate. However, when components need to be placed on both the top and bottom layers, and the dielectric thickness between the internal power and ground layers is large and coupling is poor, it is necessary to consider which layer has fewer signal lines. For Option 1, the bottom layer has fewer signal lines, and a large area of copper film can be used to couple with the POWER layer; conversely, if components are mainly arranged in the bottom layer, Option 2 should be chosen for the board.
If the laminated structure as shown in Figure 11-1, then the power and ground layers themselves have been coupled, taking into account the requirements of symmetry, the general use of Scheme 1.
After completing the analysis of the laminated structure of the 4-layer board, the following is an example of a 6-layer board combination method to illustrate the arrangement and combination of the 6-layer board laminated structure and the preferred method.
(1) Siganl_1 (Top), GND (Inner_1), Siganl_2 (Inner_2), Siganl_3 (Inner_3), POWER (Inner_4), Siganl_4 (Bottom).
Scheme 1 adopts 4 signal layers and 2 internal power/ground layers, with more signal layers, which is conducive to the wiring work between components, but the defects of this scheme are also more obvious, as shown in the following two aspects.
① The power and ground layers are separated far apart and are not adequately coupled.
② The signal layer Siganl_2 (Inner_2) and Siganl_3 (Inner_3) are directly adjacent to each other, and the signal isolation is not good, and crosstalk is easy to occur.
2) Siganl_1 (Top), Siganl_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Siganl_3 (Inner_4), Siganl_4 (Bottom).
Scheme 2 has an advantage over Scheme 1 in that the power and ground layers are adequately coupled, but the problems of Siganl_1 (Top) and Siganl_2 (Inner_1) and Siganl_3 (Inner_4) and Siganl_4 (Bottom) signal layers being directly adjacent to each other, with poor signal isolation, and susceptibility to crosstalk are not not resolved.
(3) Siganl_1 (Top), GND (Inner_1), Siganl_2 (Inner_2), POWER (Inner_3), GND (Inner_4), Siganl_3 (Bottom).
Compared to Scheme 1 and Scheme 2, Scheme 3 has one less signal layer and one more inner electrical layer. Although the number of layers available for wiring is reduced, the scheme solves the defects common to Scheme 1 and Scheme 2.
① The power and ground layers are tightly coupled.
② Each signal layer is directly adjacent to the inner electrical layer, and there is effective isolation from all other signal layers, making crosstalk less likely to occur.
③ Siganl_2 (Inner_2) and the two inner electrical layers GND (Inner_1) and POWER (Inner_3) are adjacent to each other and can be used to transmit high-speed signals. The two inner electrical layers can effectively shield the external interference to the Siganl_2 (Inner_2) layer and the Siganl_2 (Inner_2) to the external interference.
When the high-speed signal propagates on the signal line, in the process of signal forward propagation, due to the existence of capacitive coupling between the reference planes, when dV/dt occurs, there will be a phenomenon that the current flows to the reference plane through the coupling capacitor, and the position below the transmission line will have a transient current flowing back to the source circuit.
When the power supply layer is used as the reference plane, the signal return current will first flow to the power supply layer, then flow to the ground network through the Cpg between the power supply and the ground network, and finally flow to the source circuit through the ground layer, finally forming a complete power supply loop. It is very critical to control the loop impedance of high-speed signals because it directly affects the signal transmission characteristics.
Theoretically as with ground planes, power signal layers can be applied to low impedance signal return paths. Assuming a sufficient amount of bypass capacitance, the power plane transmission will be just as good as ground, and a power plane and ground plane or two power plane ribbon transmission line will work. However, when the signal is referenced to the power plane, one of the return paths that has the most impact on the signal is the capacitive channel between the Cpg power and ground networks. It may be a complex distribution of decoupling capacitance on the power supply ground network, may also contain a flat capacitance between the planes of the power supply ground layer, due to the complexity of the composition of the impedance characteristics are different at each frequency point, it is difficult to quantify and control, so it is difficult to establish this assumption.
Even if the power layer is closer to the signal layer, the return signal will be returned to the ground layer via the power layer, because the signal input is based on the ground layer as the reference layer. But if the decoupling is not done well, the impedance between the power and ground layers will be large, and then the return signal will be subject to a large impedance.
The signal reference power layer will bring the signal quality, the impedance between the power supply ground layer is the main factor of influence, the higher the signal frequency, the more obvious the influence will be. **Of course, not all signals can not be referenced to the power supply, specifically how many frequencies, what signals can be referenced to the power supply, depending on the actual PCB design and the actual situation of the PDN network, it is best to use simulation software to analyse and verify.
This is because the chip's internal signals are referenced to the power supply, so it is better to reference the power supply on the PCB. But most of the chip in the design of high-speed signals are referenced to the ground, so in most high-speed signal design guidelines are recommended to refer to the ground, although in the high-frequency band power decoupling capacitors show low impedance characteristics, power and ground performance for equipotential, but by the decoupling capacitors with the location of the placement of the problem may increase the signal return area, thereby affecting the quality of the signal, so for the majority of high-speed signals, reference to the status of the better.
