  +86-147-3753-9269       purchases@ruomeipcba.com
The Development Trend of Glass Substrate
Home » Blogs » The Development Trend of Glass Substrate

The Development Trend of Glass Substrate

Views: 0     Author: Site Editor     Publish Time: 2024-09-11      Origin: Site

Inquire

facebook sharing button
twitter sharing button
line sharing button
wechat sharing button
linkedin sharing button
pinterest sharing button
whatsapp sharing button
sharethis sharing button
The Development Trend of Glass Substrate

The demand for high-performance, sustainable computing and networking wafers in artificial intelligence (AI) has undoubtedly increased R&D investment and accelerated the pace of innovation in semiconductor technology. With Moore's Law slowing down at the chip level, people want to package as many Chiplet (small chip) as possible within an ASIC (application-specific integrated chip) package in order to get the advantages of Moore's Law at the package level.


An ASIC package that houses multiple Chiplet typically consists of an organic substrate. It is made of resin (mainly glass fiber reinforced epoxy resin laminate) or plastic. Depending on the packaging technology, the chips are either mounted directly on the substrate, or an additional silicon intermediary layer is added between the chips to achieve high-speed connections between the Chiplet. Bridges are sometimes embedded inside the substrate instead of an intermediate layer to provide high-speed connectivity.


The problem with organic substrates is that they tend to warp, especially in large packages with high chip density. This limits the number of chips in the package. And this is where the glass core substrate (GCS, short for "Glass substrate") can be a game changer! It is expected to play a key role in the next generation of advanced chip packaging.


Why glass substrate?

Glass as a material is widely studied and integrated in m

ultiple semiconductor industries, and this trend represents a significant development in the selection of advanced packaging materials. Glass has several advantages over organic and ceramic materials.

Unlike organic substrates, which have been the dominant technology for many years, glass has excellent dimensional stability, thermal conductivity and electrical properties. The glass substrate, combined with the wiring layer above and below and other auxiliary materials, is jointly made of the substrate, which can perfectly solve the many shortcomings of the current organic substrate. In addition, the glass substrate provides engineers with greater design flexibility, allowing inductors and capacitors to be embedded into the glass for better power supply solutions and lower power consumption.

The advantages of glass substrate are as follows:

* The glass substrate can be made very flat for finer patterning, which can reduce pattern distortion by 50% and higher (10 times) wiring density. During lithography, the entire substrate is evenly exposed, thus reducing defects.

* The coefficient of thermal expansion of the glass is similar to that of the silicon chip above, which can reduce thermal stress.

* Does not warp and can handle higher density chips in a single package. The initial prototype can handle chip densities 50 percent higher than organic substrates.

Optical interconnects can be seamlessly integrated, resulting in more efficient co-packaged optics.

* These substrates are usually rectangular wafers, increasing the number of chips per wafer, increasing production and reducing costs.

Glass substrates have the potential to replace in-package organic substrates, silicon intermediate layers, and other high-speed embedded interconnect devices.


However, there are some challenges with glass substrates:

* The glass is brittle and fragile, which is easy to break during the manufacturing process. This fragility requires careful handling and special equipment to prevent damage during manufacturing. This is a weakness for products that face a high risk of physical impact, such as mobile phones, laptops and automotive equipment.

Ensuring proper bonding between the glass substrate and other materials used in semiconductor stacks, such as metals and dielectrics, is challenging and difficult to evenly fill the through-holes of the lines. Differences in material properties can cause stress at the interface, which can cause delamination or other reliability issues. Although the coefficient of thermal expansion of glass is similar to silicon, it is very different from the material used for PCB boards/bumps. This mismatch can create thermal stress during the temperature cycle, affecting reliability and performance.

* Too transparent, which will affect the accuracy of the measurement, and the yield is too low, insufficient capacity.

* The lack of established industry standards for glass substrates leads to differences in performance among different suppliers. Because it is a new technology, there is not enough long-term reliability data. More accelerated life testing is needed to gain confidence in using these packages for high-reliability applications.


Despite these drawbacks, glass substrates hold promise for high-performance computing (HPC), AI, and DC networking silicon, where the focus is on encapsulating as much throughput as possible within an ASIC package to improve the overall scale, performance, and efficiency of the system.


Lee Chang-min, a research analyst at KB Securities, predicts: "With the exponential growth of AI data processing, organic (plastic) material substrates will become scarce by 2030. Glass substrates are initially applied to high-quality products such as AI accelerators and server cpus, and are expected to gradually expand to a wider range of product areas."


The source also pointed out that the glass through hole (TGV) technology is not yet mature enough to be used for processing glass substrates and remains a difficult challenge due to the level of precision required. Glass substrates are still in the early stages of development.

图片13.

AI chips create demand for glass substrates

Glass substrates are recognized as a key material for the next generation of advanced semiconductor packaging technologies and are necessary to support the explosive growth of AI chips.


The expansion of TSMC's CoWoS advanced packaging capacity has barely kept pace with the rapidly growing demand for AI chips, prompting semiconductor companies to seek alternatives. According to industry sources, advanced packaging using glass substrates is a potential solution.


Currently, semiconductor companies are developing two glass substrates for advanced packaging. One is designed to replace the silicon intermediary layer, using glass as a platform for chip integration. Sources say TSMC and Innolux are moving in that direction.


Another glass substrate will be used at the core of the ABF substrate, replacing the copper clad plate (CCL). Sources say Intel and Austria's AT&S are jointly developing this type.


Intel initially took a different approach to developing advanced packages. The company seeks to leverage its Co-packaged optics (CPO) technology, which uses glass substrates to enhance signal transmission.


According to the sources, the glass will mainly be used in 110mm x 110mm and larger substrates to meet the needs of end-device applications such as CPU and GPU for servers, switching ics and RF modules.


Glass substrate is the key to FOPLP

Glass substrates have become a key strategic element of fan-out panel level packaging (FOPLP), a technology being developed by TSMC and various back-end plants. Because of this, TSMC initially chose a glass panel size of 515mm x 510mm, according to industry sources, and more recently is said to have settled on a larger size adopted by leading back-end factory ASE.


FOPLP is an extension of fan-out wafer-level packaging (FOWLP) technology. Because FOPLP uses a larger panel, it can handle several times as many chips as 300mm wafers.

According to sources, FOPLP developers are using a variety of panel sizes, mainly including 300mm x 300mm, 515mm x 510mm, 600mm x 600mm and 620mm x 750mm.

Display panel manufacturer Innolux has entered the semiconductor space and is developing FOPLP with the largest panel size of any peer manufacturer - 620mm x 750mm.

As the importance of glass substrates in advanced chip packaging increases, competition among manufacturers is increasing, driving innovation and investment in this promising technology.


Price increase of glass substrate material

FOPLP panels can be PCB or glass substrates, similar to those used to manufacture LCD screens.

People in the glass manufacturing industry point out that the glass substrate of FOPLP and LCD panels is essentially the same. While the purity of LCD glass is already high, semiconductor applications are even more demanding. Glass suppliers will further improve to meet semiconductor requirements.



Quick Links

Follow Us

Payment partners

Contact Us

   +86 14737539269
   Optics Valley Dingchuang International ,East Lake High-Tech Development Zone , Wuhan
Copyright © 2023 Ruomei Electronic Co., Ltd. All Rights Reserved. Privacy Policy. Sitemap. Technology by leadong.com
Email ID :