Trends in Glass Substrate Or Glass Core Technology

Regarding glass substrate or glass core technology, there are two important commercial information in the past six months.

The so-called glass core, where is glass?

Do a simple science popularization first, a piece of die needs to be packaged after it is created. On the one hand, this work is to make the die and the outside world can be electrically and signal connection, after all, the chip needs to interact with the outside world; On the other hand, the package also provides a stable working environment for the chip. At least something like the CPU chip should be held in the hand, never let the hand directly touch the device inside the die.

Therefore, when the retail CPU chip is held in the hand, we can see the top cover and the green substrate below (the following substrates are in English substrate).

From the early years of DIP double-row pin package, to surface mount, BGA package, chip flip (flip chip), packaging technology has also gone through multiple generations of changes. Until now, with the emergence of "advanced packaging" represented by 2.5D/3D packaging, packaging technology has become more complex.

It can be summarized that the direction of packaging technology has always been more and more dense interconnection implementation - that is, greater throughput of internal die requirements and external connections. This should be the core driving packaging technology progress. The emergence of 2.5D packaging is not only because of the reticle limit of single die size, but also because the packaging substrate is difficult to meet the intensive interconnection needs of multiple Dies.

Instead, consider adding an interposer, a layer between die and substrate. This interposer can carry more dense wiring and interconnection, and the communication efficiency between die and die is improved.

With such a foundation, we can begin to talk about what is glass core technology. Samtec, a maker of electronic connectivity solutions, gave a presentation on glass core technology last year. The diagram below shows where this technique can be applied. Among them, the glass interposer is more concerned - that is, a part of the interposer in the 2.5D advanced package is changed to glass.

It seems that in the context of foreign scientific research and commercial discussions on glass cores, although everyone is talking about glass substrate, it actually points to glass interposer.

In a talk from Georgia Tech and IMAP about Glass Core Substrates, Professor Swaminathan pointed to the application of technology in heterogeneous architectures and pointed to glass interposer. The classification is given in the figure above.

Not only is 2.5D used as an interposer medium for interconnection between Dies, but in 3D Non-TSV applications there is also the so-called "3D Glass Embedding" - stacked vertically. However, from the 2.5D package of glass, comparing the two column solutions of silicon and organic, it is not difficult to find that glass interposer here not only plays the role of interposer, It also exists as a package substrate (note that it is one level less than the other two types of solutions).

From this perspective, the roles of glass interposer and substrate seem to overlap; However, when it exists as the role of substrate, it also meets the requirements of higher density interconnection.

However, according to the technical information released by Intel, the glass core substrate substrate they are preparing for commercial use is mainly used as substrate, as shown in the figure above. The glass core substrate here is used to partially replace the earlier organic substrate - that is, we can often see the PCB material under the chip after packaging.

When AnandTech introduced this technology last year, it was also clearly mentioned that it is not yet a replacement for 2.5D packaging solutions such as CoWoS/EMIB. In other words, the glass core substrate should not yet exist as the silicon bridge and silicon interposer common in 2.5D packaging.

In addition, it is worth mentioning that if you look at this PPT of Intel carefully, you will find that the so-called glass core substrate is not the whole substrate into glass (so it is called glass core), but the core material of the substrate is glass. The RDL(redistribution layer) is located on both sides.

One of the benefits of changing the substrate to a glass core is that it allows for more dense interconnections. The data given by Intel is that their solution achieves TGV(through-glass vias, similar to TSV) pitch of 75μm, which can achieve more flexible signal routing, or less RDL layer.

But in fact, readers who are concerned about 2.5D advanced packaging should know that 75μm is not enough even on 2.5D silicon bridge schemes (such as EMIB), not to mention the 3D hybrid bonding bond and spacing are already <10μm. Therefore, the glass core substrate here indeed exists as a replacement of the organic substrate to enhance the interconnection density.

However, it seems that Intel intends to make the glass core substrate complementary to other packaging technologies, for example, some chiplet solutions require higher bandwidth than the traditional substrate wiring, but do not require the same high interconnection density as EMIB packaging, so glass core substrate can be selected.

Look at the side profile in the middle. In addition to the upper and lower RDL layers, the middle one is the TGV

TGV glass through the hole

It is worth mentioning that the TGV through the glass, Samtec believes that the thickness of the "sweet spot" is about 200μm - but if you choose a different type of glass, the thickness of the substrate can be 40 to 20μm. Intel also mentioned that the aspect ratio of TGV is more exaggerated than traditional solutions when talking about the glass core substrate technology (it will be mentioned later that the glass core thickness of 1mm, 20:1 aspect ratio, suitable for AI and data centers).

The real value of the glass core lies in the material itself. The first is that the surface roughness is similar to silicon, which makes it possible to create a fine RDL layer on it. Secondly, the coefficient of thermal expansion (CTE) is also good, and the substrate can keep relatively consistent with die when the material warps and changes. Young's Modulus, also known as the modulus of elasticity, gives the required stiffness. moisture absorption is the same as silicon. Thermal conductivity is basically the existence of thermal insulation materials.

There are some advantages to related applications, such as hermetic package applications, where laser-based welding can be performed at room temperature without the need for high temperatures. There are also light-based signal transmission systems, and glass has more natural advantages.

Intel has previously summarized that the mechanical and electrical properties of glass are better, including higher resistance to high temperature during packaging compared with organic substrate, thus achieving smaller warping and deformation. It's flatter, so packaging and lithography are easier. The TGV itself has better electrical performance, such as low loss, and enables cleaner signal routing and power supply - 448G signal transmission can be achieved without the need for optical interconnection; Of course, lower losses also mean more power savings.